Powerhouses of the future: Comparing the RISC and CISC processor designs

With the launch of the Apple M1 processor in November last year, the pedestal occupied by x86 processors, such as those from Intel and AMD, may soon be put into question.

As Apple’s first ARM-based processor, the M1 has gained traction in the tech community for its significant claims on power efficiency and performance in comparison with earlier x86 Intel variants. 

As more companies transition from x86 to ARM, high-performing yet energy-efficient computers may no longer be far from reach. The world could be looking at a future where the routine practice of carrying a charger for every cafe trip becomes obsolete or perhaps one where the never-ending “power vs performance” debate no longer matters.

A different approach

What sets the ARM processor architecture apart from the more familiar x86 processor architecture? The answer lies in understanding “clock speed”—the speed at which a processor generates pulses known as its clock cycle, measured in clock cycles per second (Hz). 

A single pulse is one clock cycle, and a processor can undergo basic instructions such as fetching, decoding, and executing information in this single clock cycle. .

Intel’s i7-7700K processor, for example, runs at a base frequency of 4.2 GHz— over four billion clock cycles per second. x86 processors are based on the complex instruction set computer (CISC)  architecture which accomplishes tasks in the minimal amount of “assembly lines”—any low-level programming language.

The CISC approach to processing utilizes hardware with instructions stored in transistors—complex instructions—that allow the CPU to accomplish tasks such as manipulating functions without user intervention. A CPU that adopts the CISC approach utilizes multiple clock cycles to accomplish these tasks. 

ARM-based processors, on the other hand, are based on the reduced instruction set computer (RISC) architecture, which is a fundamentally different approach. Roger Uy, an assistant professor at the College of Computer Studies, explains to The LaSallian that the RISC architecture supports basic instructions. In essence, it requires more coding than CISC.

RISC uses what is known as a “reduced instructions” architecture, which operates in a single clock cycle unlike CISC’s multiple clock cycle approach. While the CISC approach allows for the CPU to perform tasks, the RISC approach requires a programmer to code the basic assembly lines to perform the same task and consumes more memory for the storage of these instructions.

While the RISC design seems inefficient relative to the CISC design in terms of execution of basic instructions, the lack of complex instructions allows for less transistors and other hardware This results in RISC consuming less power relative to CISC.

Power and performance

How do the RISC designs such as the ARM-based chips compare with x86 processors? In terms of processing power, the x86 still takes the medal. Familiar brands such as Intel and AMD develop the powerful x86 CPUs we see in our desktops today.

Uy notes that Intel has also developed and utilized low-power processors for laptops to accommodate for the battery lifetime. He points out however, that the processors in desktops are “powerful and faster” but are “energy-hungry”. 

Quality of life features are a highlight for the x86 architecture. Uy mentions that because of the complex language of the x86 architecture, the CPU is capable of performing “high-level” programming instructions that “make the developer’s life easier”.

One of the advanced concepts that CISC features is instruction set extensions, which include data encryption instructions and Single Instruction Multiple Data (SIMD). These are employed in encryption-decryption handling and data parallelism, respectively.

Contrary to popular belief, clock speed is not the only parameter that can assess a processor’s performance. According to Uy, graphics processing unit (GPU) integration, on-demand speed boost, virtualization technology support, and instruction set extension support are also processor features to be considered.

So where does the RISC design fit in? ARM-based processors—as mentioned previously—utilize less transistors than your average CISC processor and thus, without the ability to use complex instructions, are generally not as powerful in terms of processing power. 

However in terms of energy consumption, Uy explained that for these ARM-based processors, “fewer process flow equates to fewer components and thus more power efficiency.” This power efficiency is a distinct advantage of RISC processors and makes the RISC design more applicable to mobile devices such as smartphones and laptops.

What’s in store for the future?

It is obvious that RISC and CISC were derived from different design philosophies. One boasts high performance while the other promotes power efficiency.

For tech consumers,  choosing between these two features had always been a familiar dilemma. However, an “equilibrium” can be expected to occur before long, as “RISC’s and CISC’s development paths will eventually converge to a midpoint,” Uy presumes.

Improvements can also be expected for mobile devices, such as smartphones and tablets. While it is true that some form of convergence is conceivable, both architectures will remain distinct by incorporating exclusive features in their respective architectures to perpetuate their position in the market.

By Eiji Sunagawa

By Cielo Bagnes

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